Novel systolic schemes for serial-parallel multiplication

In this paper two new schemes of systolic multipliers are proposed, one based on Modified Booth encoding and the other is based on the selection of one of the terms 0, X, 2X, 3X where x is the serial input of the multiplier. The proposed multipliers operate with 100% efficiency that is without zero...

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Published in13th European Signal Processing Conference (EUSIPCO 2005) pp. 1 - 4
Main Authors Sideris, I., Anagnostopoulos, K., Kalivas, P., Pekmestzi, K.
Format Conference Proceeding Journal Article
LanguageEnglish
Published IEEE 01.09.2005
Subjects
Complexity
Complexity theory
Computer architecture
Delays
Encoding
Hardware
Microprocessors
Multiplication
Multipliers
Serials
Signal processing
Throughput
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Summary:In this paper two new schemes of systolic multipliers are proposed, one based on Modified Booth encoding and the other is based on the selection of one of the terms 0, X, 2X, 3X where x is the serial input of the multiplier. The proposed multipliers operate with 100% efficiency that is without zero words inserted between successive data. Systolisity and the continuous operation are achieved without an increase in hardware complexity. The proposed schemes are especially suited for long number multiplication.
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ISBN:1604238216
9781604238211