Low power device technology with SiGe channel, HfSiON, and poly-Si gate

We report solutions to the formidable challenges posed by integrating a HfSiON dielectric with a poly-Si gate for low-power device technology. A 1.5 nm EOT HfSiON is demonstrated with mobility comparable to SiO/sub 2/ and 3 orders of magnitude leakage reduction. A novel boron delta-doped strained-Si...

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Bibliographic Details
Published inIEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 pp. 161 - 164
Main Authors Wang, H.C.-H., Shang-Jr Chen, Ming-Fang Wang, Pang-Yen Tsai, Ching-Wei Tsai, Ta-Wei Wang, Ting, S.M., Tuo-Hung Hou, Peng-Soon Lim, Huan-Just Lin, Ying Jin, Hun-Jan Tao, Shih-Chang Chen, Diaz, C.H., Mong-Song Liang, Chenming Hu
Format Conference Proceeding
LanguageEnglish
Published Piscataway NJ IEEE 2004
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Summary:We report solutions to the formidable challenges posed by integrating a HfSiON dielectric with a poly-Si gate for low-power device technology. A 1.5 nm EOT HfSiON is demonstrated with mobility comparable to SiO/sub 2/ and 3 orders of magnitude leakage reduction. A novel boron delta-doped strained-SiGe channel points a way out of the high threshold voltage problem associated with Fermi-pinning at the high-k/poly-Si interface and ameliorates short-channel effects in PMOS devices. In addition, a 20% hole mobility enhancement and 15% I/sub on/-I/sub off/ characteristics improvement are achieved owing to the compressive SiGe channel. NMOS PBTI lifetime of 35 years, and PMOS NBTI and NMOS hot carrier lifetimes of more than 1000 years are demonstrated at 1.2 V.
ISBN:0780386841
9780780386846
DOI:10.1109/IEDM.2004.1419096