Trade-Off Between TID and SEGR Effects Based on High-Voltage Radiation-Hardened Gate Oxide

• Published in: 2024 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD) pp. 442 - 445
• Main Authors: Li, Yanfei, Qiao, Ming, Xie, Rubin, Hong, Genshen, Zhang, Bo
• Format: Conference Proceeding
• Language: English
• Published: IEEE 02.06.2024
• Subjects: High-voltage techniques; Layout; Logic gates; MOSFET; Power semiconductor devices; Radiation hardening (electronics); radiation-hardened gate oxide; single-event gate rupture; Threshold voltage; threshold voltage shift; total ionizing dose
• ISSN: 1946-0201
• DOI: 10.1109/ISPSD59661.2024.10579653

High-voltage (HV) MOSFET is more sensitive to the total ionizing dose (TID) effect due to the thick gate oxide that is used to keep from single-event gate rupture (SEGR) effect. The radiation-hardened gate oxide (RH-GOX) process makes a good tradeoff between TID effect and SEGR failure. Based on the heavily doped region and deep trench isolation technique, the MOSFET devices is designed by the interdigitated structure instead of enclosed-gate layout. The experimental results indicate that radiation-induced threshold voltage shifts (\Delta V_{\text{th}}) have a strong dependence on bias conditions during radiation. In both the NMOS and PMOS transistors, radiation-induced threshold voltage shifts are proportional to power exponent of gate oxide thickness (T_{\text{ox}}) , and the coefficient factor is 1.12. With T_{\text{ox}}=120 nm, the proposed circuit is not susceptible to SEGR failure with a linear energy transfer (LET) value of 82.7 Mev-cm 2 /mg.