15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 1012 Write Endurance and Integrated Margin-Expansion Schemes

• Published in: 2024 IEEE International Solid-State Circuits Conference (ISSCC) Vol. 67; pp. 292 - 294
• Main Authors: Lin, Ku-Feng, Noguchi, Hiroki, Shih, Yi-Chun, Yuh, Perng-Fei, Lee, Yuan-Jen, Chang, Tung-Cheng, Huang, Sheng-Po, Lin, Yu-Fan, Lee, Chun-Ying, Huang, Yen-Hsiang, Tsai, Jui-Che, Adham, Saman, Noel, Peter, Yazdi, Ramin, Gershoig, Marat, Shin, YangJae, Joshi, Vineet, Wong, Ted, Jiang, Meng-Ru, Wu, J. J., Cheng, Chun-Tai, Wang, Yu-Jen, Chuang, Harry, Chih, Yu-Der, Wang, Yih, Chang, Tsung-Yung Jonathan
• Format: Conference Proceeding
• Language: English
• Published: IEEE 18.02.2024
• Subjects: Magnetic tunneling; Nonvolatile memory; Random access memory; Solid state circuits
• ISSN: 2376-8606
• DOI: 10.1109/ISSCC49657.2024.10454339

STT-MRAM has been demonstrated as a viable embedded non-volatile memory (NVM) with 20-year data retention at 150°C, a high write endurance (>1M cycles), and the ability to tolerate solder reflow [1]. However, for working memory applications, even higher endurance, fast write speed, and small memory size are necessary. By optimizing the magnetic-tunnel-junction (MTJ) stack for a lower write current, while relaxing retention requirements (e.g., 1 min @ 125°C), STT-MRAM can achieve a higher endurance (>10 12 cycles) and a smaller bit cell size. Therefore, STT-MRAM is a promising alternative to SRAM as a working memory solution, while also offering a higher memory density compared to SRAM-based solutions.