CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Embedded FPGAs (eFPGA) are increasingly being used in SoCs, enabling post-silicon hardware specialization. Existing CPU-eFPGA SoCs have three deficiencies. First, their low core count hinders efficient execution of thread-level-parallel workloads. Second, noncoherent or partially coherent CPU-eFPGA...

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Published in2023 IEEE Custom Integrated Circuits Conference (CICC) pp. 1 - 2
Main Authors Chang, Ting-Jung, Li, Ang, Gao, Fei, Ta, Tuan, Tziantzioulis, Georgios, Ou, Yanghui, Wang, Moyang, Tu, Jinzheng, Xu, Kaifeng, Jackson, Paul J., Ning, August, Chirkov, Grigory, Orenes-Vera, Marcelo, Agwa, Shady, Yan, Xiaoyu, Tang, Eric, Balkind, Jonathan, Batten, Christopher, Wentzlaff, David
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.04.2023
Subjects
Application specific integrated circuits
Field programmable gate arrays
Hardware
Instruction sets
Layout
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Summary:Embedded FPGAs (eFPGA) are increasingly being used in SoCs, enabling post-silicon hardware specialization. Existing CPU-eFPGA SoCs have three deficiencies. First, their low core count hinders efficient execution of thread-level-parallel workloads. Second, noncoherent or partially coherent CPU-eFPGA integration inhibits dynamic, random memory sharing. Third, the use of full-custom circuits makes proprietary eFPGAs technology-dependent, inflexible in physical layout, and lacking architectural customizability.
ISSN:2152-3630
DOI:10.1109/CICC57935.2023.10121294