A 0.5V True-Single-Phase 16T Flip-Flop in 180-nm CMOS for IoT Applications

A low voltage and low power true-single-phase flip-flop (FF) design using 16-transistor only is proposed. It is adapted from conventional master-slave based design and reduces layout area by using hybrid logic scheme. Optimization measures have resulted in a new FF with better power and area perform...

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Bibliographic Details
Published in2021 IEEE International Conference on Consumer Electronics-Taiwan (ICCE-TW) pp. 1 - 2
Main Authors Wang, Zhi-Zhong, Hung, Yi-Hsuan, Wu, Jun-Ting, Hong, Zheng-Jie, Lin, Jin-Fa
Format Conference Proceeding
LanguageEnglish
Published IEEE 15.09.2021
Subjects
Conferences
Hybrid power systems
Layout
Low voltage
Master-slave
Power measurement
Simulation
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Summary:A low voltage and low power true-single-phase flip-flop (FF) design using 16-transistor only is proposed. It is adapted from conventional master-slave based design and reduces layout area by using hybrid logic scheme. Optimization measures have resulted in a new FF with better power and area performances. Based on simulation results using the TSMC CMOS 180nm, our design achieves the conventional TGFF design by 67.3% in energy and 30.8% in layout area.
ISSN:2575-8284
DOI:10.1109/ICCE-TW52618.2021.9602974