An Implementation of a World Grid Square Codes Generator on a RISC-V Processor

• Published in: 2021 Ninth International Symposium on Computing and Networking Workshops (CANDARW) pp. 309 - 312
• Main Authors: Watanabe, Rei, Tada, Jubee, Sato, Keiichi
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.11.2021
• Subjects: Codes; Conferences; Data analysis; Encoding; Estimation; Field programmable gate arrays; Floating-point arithmetic; Grid square statistics; Logic gates; Mathematical models; Microprocessors
• DOI: 10.1109/CANDARW53999.2021.00059

This paper implements an execution unit that generates world grid square codes from latitude and longitude on a RISC-V processor and evaluates its performance. In recent years, grid square statistics have been focused for data analysis such as behavior pattern estimation of tourists. In Japan, grid squares codes which are defined in the Japan Industrial Standard (JIS) X0410 are used. Since grid square codes based on the JIS X0410 cover only the area around Japan, the world grid square coding system has been proposed. In the world grid square coding system, the world is separated into eight areas, and the world grid square code includes the code for specifying the area. In each area, the remaining of the world grid square code is obtained in the way based on the JIS X0410.Although world grid square codes are obtained from latitude and longitude based on several equations, this calculation requires a long computing time. Because it needs not only a lot of floating-point instructions for generating codes in each area, but also determining the code for the area by detecting where the latitude and longitude are. In this paper, an execution unit which generates world grid square codes from latitude and longitude is designed, and the instruction which generates world grid square codes by using the unit is implemented on a RISC-V processor. The proposed execution unit can generate the corresponding world grid square code from latitude and longitude in one cycle. As a benchmark, a program that counts the number of times randomly generated latitudes and longitudes match the specified world grid square codes is used. Experimental results show the RISC-V processor with the proposed unit which is implemented on an FPGA achieves a 48.6% reduction of execution time compared to the original processor.