Design of Intra Cluster Access Structure for Distributed Caches of Array Processor

• Published in: International Conference on Measuring Technology and Mechatronics Automation (Print) pp. 66 - 73
• Main Authors: Liu, You-Yao, Cai, Hui-Nan, Han, Si-Yi
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.01.2022
• Subjects: Array processor; Bandwidth; Distributed; Hardware; Iterative algorithms; Mapping; Memory management; Newton iterative method; Parallel processing; Reconfigurable computing; System-on-chip; Topology

Aiming at the requirements of high bandwidth and low latency for memory in reconfigurable computing, and the characteristics of high data parallelism, large access stock, and obvious temporal locality of reconfigurable array processor, an access structure is proposed. Based on the distributed Cache...