Exploiting hardware transactional memory in main-memory databases
So far, transactional memory-although a promising technique-suffered from the absence of an efficient hardware implementation. The upcoming Haswell microarchitecture from Intel introduces hardware transactional memory (HTM) in mainstream CPUs. HTM allows for efficient concurrent, atomic operations,...
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Published in | 2014 IEEE 30th International Conference on Data Engineering pp. 580 - 591 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.03.2014
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Subjects | |
Online Access | Get full text |
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Summary: | So far, transactional memory-although a promising technique-suffered from the absence of an efficient hardware implementation. The upcoming Haswell microarchitecture from Intel introduces hardware transactional memory (HTM) in mainstream CPUs. HTM allows for efficient concurrent, atomic operations, which is also highly desirable in the context of databases. On the other hand HTM has several limitations that, in general, prevent a one-to-one mapping of database transactions to HTM transactions. In this work we devise several building blocks that can be used to exploit HTM in main-memory databases. We show that HTM allows to achieve nearly lock-free processing of database transactions by carefully controlling the data layout and the access patterns. The HTM component is used for detecting the (infrequent) conflicts, which allows for an optimistic, and thus very low-overhead execution of concurrent transactions. |
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ISSN: | 1063-6382 2375-026X |
DOI: | 10.1109/ICDE.2014.6816683 |