Scalability of 3D-Integrated Arithmetic Units in High-Performance Microprocessors

• Published in: 2007 44th ACM/IEEE Design Automation Conference pp. 622 - 625
• Main Authors: Puttaswamy, K., Loh, G.H.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.06.2007
• Subjects: Circuits; Clocks; Delay; Design; Die-stacked 3D integration; Digital arithmetic; Energy consumption; Issue-width; Microprocessors; Parallel processing; Power engineering computing; Scalability; Temperature sensors

Three-dimensional integration provides a simultaneous improvement in wire-related delay and power consumption of microprocessor circuits. Prior work has looked at the performance, power, and area benefits of the 3D integration technology. In this paper, we investigate the scalability issues of 3D di...