FOWLP and Si-Interposer for High-Speed Photonic Packaging

A FOWLP and a Si-Interposer integration platform for Electronic IC (EIC) and Photonic IC (PIC) are described here. These two platforms are capable to support high-speed integration and scalable design of the next generation Optical Engine. The integration of the PIC on the FOWLP is achieved by a sim...

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Bibliographic Details
Published in2021 IEEE 71st Electronic Components and Technology Conference (ECTC) pp. 250 - 255
Main Authors Guan, Lim Teck, Ching, Eva Wai Leong, Ching, Jong Ming, Leng, Loh Woon, Wee, David Ho Soon, Bhattacharya, Surya
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.01.2021
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Summary:A FOWLP and a Si-Interposer integration platform for Electronic IC (EIC) and Photonic IC (PIC) are described here. These two platforms are capable to support high-speed integration and scalable design of the next generation Optical Engine. The integration of the PIC on the FOWLP is achieved by a simple novel solution. An additional section of the Si substrate is designed at the end of the PIC to protect the optical I/Os during the FOWLP embedding process. For the Through Si-Interposer, besides providing the EIC and PIC, it include the passive alignment feature for the fibre to the PIC assembly.
ISSN:2377-5726
DOI:10.1109/ECTC32696.2021.00050