Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage

We demonstrate an SOT-MRAM, a nonvolatile memory using spin-orbit-torque (SOT) devices that have a read-disturbance-free characteristic. The SOT-MRAM fabricated by a 55-nm CMOS process achieves 60-MHz write and 90-MHz read operations with 1.2-V supply voltage under a magnetic-field-free condition. T...

Full description

Saved in:
Bibliographic Details
Published in2020 IEEE Symposium on VLSI Circuits pp. 1 - 2
Main Authors Natsui, M., Tamakoshi, A., Honjo, H., Watanabe, T., Nasuno, T., Zhang, C., Tanigawa, T., Inoue, H., Niwa, M., Yoshiduka, T., Noguchi, Y., Yasuhira, M., Ma, Y., Shen, H., Fukami, S., Sato, H., Ikeda, S., Ohno, H., Endoh, T., Hanyu, T.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2020
Subjects
Arrays
Bandwidth
CMOS technology
Current measurement
dual-port
Logic arrays
MRAM
Performance evaluation
Semiconductor device measurement
spin-orbit-torque
spintronics
Online AccessGet full text

Cover

More Information
Summary:We demonstrate an SOT-MRAM, a nonvolatile memory using spin-orbit-torque (SOT) devices that have a read-disturbance-free characteristic. The SOT-MRAM fabricated by a 55-nm CMOS process achieves 60-MHz write and 90-MHz read operations with 1.2-V supply voltage under a magnetic-field-free condition. The SOT-MRAM is also implemented in a dual-port configuration utilizing three-terminal structure of the device, which realizes a wide bandwidth applicable to high-speed applications.
ISSN:2158-5636
DOI:10.1109/VLSICircuits18222.2020.9162774