Photon-Detection Timing-Jitter Model in Verilog-A

• Published in: 2020 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 1 - 5
• Main Authors: Lopez-Martinez, Juan Manuel, Carmona-Galan, Ricardo, Rodriguez-Vazquez, Angel
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.10.2020
• Subjects: Absorption; device simulation; Electric fields; Hardware design languages; Integrated circuit modeling; Junctions; Photon detection; Photonics; single-photon avalanche diode (SPAD); Timing jitter; Verilog-A
• ISBN: 9781728133201; 1728133203
• ISSN: 2158-1525; 2158-1525
• DOI: 10.1109/ISCAS45731.2020.9181222

Single-photon avalanche diodes can be employed to register the arrival of an individual photon. They are biased beyond breakdown voltage, and thus the electron-hole pairs generated by any incident photon is accelerated by the strong electric field triggering an avalanche current. In recent years, there have been attempts to model its characteristics in Verilog-A HDL. However, none of them have modelled its photon-detection timing jitter. This paper explains the mechanism of avalanche triggering and proposes a first approach to model it in Verilog-A. Comparison with experimental data and data reported in literature validates the model.