A Security Verification Template to Assess Cache Architecture Vulnerabilities

In the recent years, cache based side-channel attacks have become a serious threat for computers. To face this issue, researches have been looking at verifying the security policies. However, these approaches are limited to manual security verification and they typically work for a small subset of t...

Full description

Saved in:
Bibliographic Details
Published in2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) pp. 1 - 6
Main Authors Ghasempouri, Tara, Raik, Jaan, Paul, Kolin, Reinbrecht, Cezar, Hamdioui, Said, Taouil, Mottaqiallah
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.04.2020
Subjects
Analytical models
Ciphers
Computer architecture
Hardware
Side-channel attacks
Online AccessGet full text

Cover

More Information
Summary:In the recent years, cache based side-channel attacks have become a serious threat for computers. To face this issue, researches have been looking at verifying the security policies. However, these approaches are limited to manual security verification and they typically work for a small subset of the attacks. Hence, an effective verification environment to automatically verify the cache security for all side-channel attacks is still missing. To address this shortcoming, we propose a security verification methodology that formally verifies cache designs against cache side-channel vulnerabilities. Results show that this verification template is a straightforward, automated method in verifying cache invulnerability.
ISSN:2473-2117
DOI:10.1109/DDECS50862.2020.9095707