Fully digital AER convolution chip for vision processing

We present a neuromorphic fully digital convolution microchip for Address Event Representation (AER) spike-based processing systems. This microchip computes 2-D convolutions with a programmable kernel in real time. It operates on a pixel array of size 32 x 32, and the kernel is programmable and can...

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Bibliographic Details
Published in2008 IEEE International Symposium on Circuits and Systems pp. 652 - 655
Main Authors Camunas-Mesa, Luis, Acosta-Jimenez, Antonio, Serrano-Gotarredona, Teresa, Linares-Barranco, Bernabe
Format Conference Proceeding Journal Article
LanguageEnglish
Published IEEE 01.01.2008
Subjects
Biological information theory
Convolution
Decoding
Kernel
Machine vision
Matrix converters
Neuromorphics
Neurons
Protocols
Retina
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Summary:We present a neuromorphic fully digital convolution microchip for Address Event Representation (AER) spike-based processing systems. This microchip computes 2-D convolutions with a programmable kernel in real time. It operates on a pixel array of size 32 x 32, and the kernel is programmable and can be of arbitrary shape and size up to 32 x 32 pixels. The chip receives and generates data in AER format, which is asynchronous and digital. The paper describes the architecture of the chip, the test setup, and experimental results obtained from a fabricated prototype.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISBN:9781424416837
1424416833
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2008.4541502