Robustness-oriented P-band phased array radar front-end with high phase and gain resolution in 0.18 ${\rm \mu m}$μm BiCMOS

• Published in: IET microwaves, antennas & propagation Vol. 14; no. 9; pp. 960 - 966
• Main Authors: Wu, Wen-Guang, Fang, Yun, Yu, Xiao-Peng, Sui, Wen-Quan, Chen, Jer-Ming, Yeo, Kiat Seng
• Format: Journal Article
• Language: English
• Published: The Institution of Engineering and Technology 29.07.2020
• Subjects: 6‐bit attenuator; attenuators; BiCMOS integrated circuits; control circuits; gain 12.0 dB; gain 29.0 dB; Ge‐Si alloys; III‐V semiconductors; low noise amplifier; low noise amplifiers; noise figure 3.0 dB; phase controls; phase shifters; phased array radar; power 60.0 mW; power 600.0 mW; power amplifier; power amplifiers; process‐voltage‐temperature variations; prototype front‐end; PVT variations; radar applications; receiver gain; Research Article; robustness‐oriented P‐band phased array radar front‐end; SiGe; SiGe BiCMOS technology; temperature 100.0 degC; temperature compensation techniques; transmitter gain; voltage 3.3 V; word length 6 bit; transmitter gain; Ge-Si alloys; prototype front-end; robustness-oriented P-band phased array radar front-end; noise figure 3.0 dB; gain 12.0 dB; power 60.0 mW; radar applications; SiGe; receiver gain; PVT variations; BiCMOS integrated circuits; word length 6 bit; power amplifiers; low noise amplifier; gain 29.0 dB; SiGe BiCMOS technology; power amplifier; voltage 3.3 V; low noise amplifiers; phase shifters; phase controls; process-voltage-temperature variations; 6-bit attenuator; control circuits; temperature 100.0 degC; temperature compensation techniques; power 600.0 mW; attenuators; phased array radar; III-V semiconductors
• ISSN: 1751-8725; 1751-8733
• DOI: 10.1049/iet-map.2019.0792

In this study, the authors present a P-band phased array front-end for radar applications, implemented using a 0.18 ${\rm \mu m}$μm SiGe BiCMOS process, thereby enhancing robustness over process-voltage-temperature (PVT) variations. It comprises a low noise amplifier, 6-bit attenuator, 6-bit phase shifter, power amplifier, T-R switches as well as control circuits. As the key here is to achieve high resolutions in both gain and phase controls, the 6-bit attenuator and 6-bit phase shifter are optimised by cascading unit cells with different topologies, hence ensuring a good balance between accuracy, silicon area and robustness. Temperature compensation techniques are also used in the low noise amplifier and power amplifier so that the circuit works robustly against PVT variations. Fabricated using TowerJazz 0.18 ${\rm \mu m}$μm SiGe BiCMOS technology, the prototype front-end occupies a chip area of $5\times 2.5\,\mathrm {mm}^2$5×2.5mm2, including bonding pads and test buffers. It performs with a receiver (RX) gain of 12 dB, a 3 dB noise figure, and a transmitter (TX) gain of 29 dB, while consuming 60 mW (RX mode) and 600 mW (TX mode) from a 3.3 V supply voltage. The chip is also measured in extreme conditions (e.g. temperatures exceeding $100^\circ {\rm C}$100°C) to ensure robust operation and is suitable for low-cost phased array systems.