Air-Gap Application and Simulation Results for Low Capacitance in 60nm NAND Flash Memory

In IMD study Rs reduction and better uniformity as well as lower capacitance were achieved in 60 nm 2 Giga Bit NAND flash memory. It alos fabricated 70 % air-gap of gate and calculated interference reduction in 45 nm device when it was applied throughout simulation. It is sure that we should apply t...

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Bibliographic Details
Published in2007 22nd IEEE Non-Volatile Semiconductor Memory Workshop pp. 54 - 55
Main Authors Sukjoong Kim, Wheewon Cho, Junggeun Kim, Byungseok Lee, Sungki Park
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.01.2007
Subjects
Air gaps
Capacitance measurement
Dielectric constant
Dielectric materials
Dielectric measurements
Electric variables measurement
Interference
Research and development
Sputtering
Tungsten
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Summary:In IMD study Rs reduction and better uniformity as well as lower capacitance were achieved in 60 nm 2 Giga Bit NAND flash memory. It alos fabricated 70 % air-gap of gate and calculated interference reduction in 45 nm device when it was applied throughout simulation. It is sure that we should apply this air-gap process to future device in order to meet device property of cell Vt shift and capacitance.
ISBN:9781424407521
1424407524
ISSN:2159-483X
DOI:10.1109/NVSMW.2007.4290578