High Endurance Self-Heating OTS-PCM Pillar Cell for 3D Stackable Memory

For the first time published, high endurance OTS (ovonic threshold switch, here, TeAsGeSiSe-based) is integrated with PCM (here, doped Ge2Sb2Te5) to form a 3D stackable pillar type device. With the help of an etch buffer layer and a damage-free pillar RIE process, we achieved 100% array yield withou...

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Bibliographic Details
Published in2018 IEEE Symposium on VLSI Technology pp. 205 - 206
Main Authors Yeh, C. W., Chien, W. C., Bruce, R. L., Cheng, H. Y., Kuo, I. T., Yang, C. H., Ray, A., Miyazoe, H., Kim, W., Carta, F., Lai, E. K., BrightSky, M., Lung, H. L.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2018
Subjects
Annealing
Buffer layers
Electrodes
Phase change materials
Thermal stability
Three-dimensional displays
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ISSN2158-9682
DOI10.1109/VLSIT.2018.8510621

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Summary:For the first time published, high endurance OTS (ovonic threshold switch, here, TeAsGeSiSe-based) is integrated with PCM (here, doped Ge2Sb2Te5) to form a 3D stackable pillar type device. With the help of an etch buffer layer and a damage-free pillar RIE process, we achieved 100% array yield without OTS/PCM composition modification. Anneal tests show this one-selector/one-resistor (1S1R) pillar device is BEOL-compatible.We report excellent electrical performance by 1S1R OTS-PCM device; selector provides the fast turn on/off speed which enables 10ns fast RESET speed, program endurance is 10 9 cycles, and read endurance is higher than 10 11 cycles.
ISSN:2158-9682
DOI:10.1109/VLSIT.2018.8510621