High density vertical interconnects for 3-D integration of silicon integrated circuits
This paper describes a technology platform being developed for three-dimensional (3-D) integration of thin stacked silicon integrated circuits (ICs). 3-D integration technology promises to dramatically enhance on-chip signal processing capabilities of a variety of sensor and actuator array devices h...
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Published in | 56th Electronic Components and Technology Conference 2006 p. 5 pp. |
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Main Authors | , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
2006
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Subjects | |
Online Access | Get full text |
ISBN | 1424401526 9781424401529 |
ISSN | 0569-5503 |
DOI | 10.1109/ECTC.2006.1645677 |
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Summary: | This paper describes a technology platform being developed for three-dimensional (3-D) integration of thin stacked silicon integrated circuits (ICs). 3-D integration technology promises to dramatically enhance on-chip signal processing capabilities of a variety of sensor and actuator array devices hybridized with silicon read-out electronics. Currently, advanced 3-D integrated infrared focal plane array detectors are being developed within the DARPA vertically integrated sensor arrays (VISA) program. Here, we describe the 3-D integration process flow and demonstrations developed in the VISA program |
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ISBN: | 1424401526 9781424401529 |
ISSN: | 0569-5503 |
DOI: | 10.1109/ECTC.2006.1645677 |