New electrical testing structures and analysis method for MOL and BEOL process diagnostics and TDDB reliability assessment

• Published in: 2013 IEEE International Reliability Physics Symposium (IRPS) pp. PI.1.1 - PI.1.5
• Main Authors: Fen Chen, Mittl, S., Shinosky, M., Dufresne, R., Aitken, J., Yanfeng Wang, Kolvenback, K., Henson, W. K., Mocuta, D.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.04.2013
• Subjects: Dielectric breakdown; Equations; Logic gates; low-k reliability; low-k TDDB; MOL reliability; Optical variables measurement; PC-CA reliabiltiy; PC-CA TDDB; Pollution measurement; Reliability
• DOI: 10.1109/IRPS.2013.6532104
• ISBN: 9781479901128; 1479901121
• ISSN: 1541-7026

Both MOL PC-CA spacer dielectric and BEOL low-k dielectric breakdown data are commonly convoluted with multiple variables present in the data due to the involvement of many process steps such as lithography, etch, CMP, cleaning, and thin film deposition. With the continuing aggressive scaling of device dimensions and introduction of new device configurations, how to accurately analyze such complicated lateral dielectric breakdown data from MOL and BEOL TDDB in advanced VLSI circuits has become very challenging. In this paper, a new electrical method is developed to accurately characterize different variables in MOL and BEOL dielectric breakdown. This method provides a powerful way to do a fast deep dive process and reliability analysis for technology development and qualification without time consuming physical failure analysis.