Low temperature epitaxial growth of Ge:B and Ge0.99Sn0.01:B source/drain for Ge pMOS devices: in-situ and conformal B-doping, selectivity towards oxide and nitride with no need for any post-epi activation treatment

• Published in: Japanese Journal of Applied Physics Vol. 58; no. SB
• Main Authors: Vohra, Anurag, Porret, Clement, Kohen, David, Folkersma, Steven, Bogdanowicz, Janusz, Schaekers, Marc, Tolle, John, Hikavyy, Andriy, Capogreco, Elena, Witters, Liesbeth, Langer, Robert, Vandervorst, Wilfried, Loo, Roger
• Format: Journal Article
• Language: English
• Published: IOP Publishing 01.04.2019
• ISSN: 0021-4922; 1347-4065
• DOI: 10.7567/1347-4065/ab027b

We report on production compatible low temperature (≤320 °C) selective epitaxial growth schemes for boron doped Ge0.99Sn0.01 and Ge in source/drain areas of FinFET and gate-all-around (GAA) strained-Ge pMOS transistors. Active B concentrations are as high as 3.2 × 1020 cm−3 and 2.2 × 1020 cm−3 for Ge0.99Sn0.01 and Ge, respectively. The Ge:B growth is based on a cyclic deposition and etch approach using Cl2 as an etchant, while the Ge0.99Sn0.01:B growth is selective in nature. Low Ti/p+ Ge(Sn):B contact resistivities of 3.6 × 10−9 cm2 (Ge0.99Sn0.01) and 5.5 × 10−9 cm2 (Ge:B) have been obtained without any post-epi activation anneal. This work is the first demonstration of a selective, conformally doped Ge1−xSnx:B source/drain epi implemented on Ge FinFET device structure with fin widths down to 10 nm and on GAA devices (horizontal compressively strained-Ge nanowires).