Performance comparison review of 8-3 compressor on FPGA

Compressors are commonly utilized in multipliers for reducing partial products in a parallel manner. In this paper 7-3, 7-4, 8-3, 8-4, 9-3, and 9-4 compressors designed with adder circuits or multiplexer circuits were implemented in Altera EP2C70F896 FPGA and their performance compared in terms of n...

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Bibliographic Details
Published inTENCON 2017 - 2017 IEEE Region 10 Conference pp. 2462 - 2465
Main Authors Yuhao Leong, HaiHiung Lo, Drieberg, Micheal, Sayuti, Abu Bakar, Sebastian, Patrick
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.11.2017
Subjects
Adders
Compressor
Computer architecture
Delays
Full and Half Adder
Logic gates
Microprocessors
Multiplexer
Multiplexing
Power demand
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Summary:Compressors are commonly utilized in multipliers for reducing partial products in a parallel manner. In this paper 7-3, 7-4, 8-3, 8-4, 9-3, and 9-4 compressors designed with adder circuits or multiplexer circuits were implemented in Altera EP2C70F896 FPGA and their performance compared in terms of number of logic gates used, cell area and power delay product (PDP) for an optimum recommendation for the implementation of 8-3 compressor design in FPGA.
ISSN:2159-3450
DOI:10.1109/TENCON.2017.8228275