A 128-tap complex FIR filter Processing 20 giga-samples/s in a single FPGA

• Published in: 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers pp. 841 - 844
• Main Authors: de Dinechin, F, Takeugming, Honoré, Tanguy, J-M
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.11.2010
• Subjects: Accuracy; Bandwidth; Chromatic dispersion; Digital signal processing; Field programmable gate arrays; Finite impulse response filter; Pipelines
• ISBN: 1424497221; 9781424497225
• ISSN: 1058-6393; 2576-2303
• DOI: 10.1109/ACSSC.2010.5757684

To enable 40Gb/s data transmission over optical fibres using QPSK modulation, the first step of the receiver signal-processing pipeline is a 128-tap FIR filter that compensates the chromatic dispersion due to the medium. We present an implementation of this FIR filter in the largest Stratix-IV GX device that is able to process 20 giga-samples per second, where each sample is a complex number with 5+5 bits resolution. This FFT-based architecture processes 128 complex samples per cycles at a frequency of 156MHz. The FFT and inverse FFT pipelines use ad-hoc memory-based constant multipliers well suited to the FPGA features, while the multiplications in the Fourier domain use the FPGA embedded DSP blocks. This FPGA is thus able to perform more than 2 tera-operations per second. The precision of the intermediate signals is chosen to ensure that the error of the output signal with respect to the Matlab reference is never more than one least significant bit.