Power Efficient Motion Estimation using Multiple Imprecise Metric Computations

• Published in: 2007 IEEE International Conference on Multimedia and Expo pp. 2046 - 2049
• Main Authors: In Suk Chong, Ortega, A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.07.2007
• Subjects: Algorithm design and analysis; Analytical models; Computational modeling; Computer architecture; Concurrent computing; Error correction; error tolerance (ET); imprecise computation; matching metric computation (MMC); Motion estimation; MPEG 4 Standard; Redundancy; Voltage; voltage overscaling (VOS)
• ISBN: 9781424410163; 1424410169
• ISSN: 1945-7871; 1945-788X
• DOI: 10.1109/ICME.2007.4285083

In this paper, we propose power efficient motion estimation (ME) using multiple imprecise sum of absolute difference (SAD) metric computations. We extend the recent work of Varatkar et al (2006) by providing analytical solutions based on modelling of computation errors due to voltage overscaling (VOS) and sub-sampling (SS). Results show that our solutions provide significantly better performance in the sense of rate increase for fixed QP, e.g., less than 5% increase, while in Varatkar et al (2006) the rate increase could be as high as 20%. It allows us to apply lower voltage which leads to additional power saving. Our analysis also allows us to compare different ME algorithms (e.g., full search vs. a fast algorithm) and SAD computation architectures (parallel vs. serial) in terms of their robustness to imprecise metric computations and their power efficiency. Finally, we demonstrate that additional power savings can be achieved by removing redundancy between the various computations.