PAM-Blox II: design and evaluation of C++ module generation for computing with FPGAs

• Published in: Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines pp. 67 - 76
• Main Author: Mencer, O.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 2002
• Subjects: Algorithm design and analysis; Argon; Cryptography; Design automation; Field programmable gate arrays; Libraries; Microprocessors; Partitioning algorithms; Productivity; Programming profession
• ISBN: 076951801X; 9780769518015
• DOI: 10.1109/FPGA.2002.1106662

This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmability of FPGAs, or in other words, the productivity of the FPGA programmer. We describe (1) the module generation library PAM-Blox II, the second generation of object-oriented module generators in C++, targeted at computing with FPGAs, and (2) examples of design tradeoffs and performance results using redundant representations for addition and multiplication, and technology mapping of comparison and elementary function evaluation. PAM-Blox II is built on top of a set of extensions to the gate level FPGA design library PamDC to provide a more efficient, portable, scalable, and maintainable module generator library. Using PAM-Blox II we demonstrate a simplified interface to bit-level programability. The simplification results from the bottom-up approach and a close coupling of architecture generation, module generation and gate level CAD. The tradeoffs for the module generators are based on trading area for speed and hand-optimizing technology mapping to the specific FPGA technology. As an example, we show that redundant number representations hold one key to unleashing the full potential of reconfigurability on the bit-level. The presented module generators are applied to encryption and compression to show the impact of the bit-level optimizations on application performance.