Analog RF model development with Verilog-A

Over the past several years, analog hardware description languages (AHDLs) have gained increasing acceptance in the areas of analog and RF circuit simulation. The widespread adoption of these standardized languages promises to bring substantial benefits to analog model developers and to the users of...

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Bibliographic Details
Published in2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium - Digest of Papers pp. 287 - 290
Main Authors Troyanovsky, B., O'Halloran, P., Mierzwinski, M.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2005
Subjects
Analog circuits
Circuit simulation
CMOS technology
Computational modeling
Computer aided engineering
Design automation
Hardware design languages
Radio frequency
Semiconductor device modeling
Semiconductor devices
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Summary:Over the past several years, analog hardware description languages (AHDLs) have gained increasing acceptance in the areas of analog and RF circuit simulation. The widespread adoption of these standardized languages promises to bring substantial benefits to analog model developers and to the users of analog simulation tools. In this paper, we examine the applicability of the Verilog-A hardware description language for analog RF modeling tasks, with an emphasis on issues of importance to circuit designers, device modeling specialists, and simulation tool developers. The current capabilities and limitations, as well as future directions, are discussed.
ISBN:9780780389830
0780389832
ISSN:1529-2517
2375-0995
DOI:10.1109/RFIC.2005.1489787