Evaluation of the Hierarchical Temporal Memory as Soft Computing Platform and its VLSI Architecture

• Published in: 2009 39th International Symposium on Multiple-Valued Logic pp. 233 - 238
• Main Authors: Melis, W.J.C., Chizuwa, S., Kameyama, M.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2009
• Subjects: Animals; Bayesian methods; Brain modeling; Computer architecture; Feature extraction; Hardware; Home appliances; Humans; Logic; probabilistic systems; soft computing; user support systems; Very large scale integration; VLSI

A large number of real world applications, like user support systems, can still not be performed easily by conventional algorithms in comparison with the human brain. Recently, such intelligence has often been reached by using probability based systems. This paper presents results on the implementat...