Exploiting don't cares to enhance functional tests

In simulation based design verification, deterministic or pseudo-random tests are used to check functional correctness of a design. In this paper we present a technique generating tests by specifying the don't care inputs in the functional specifications so as to improve their coverage of both...

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Bibliographic Details
Published inProceedings International Test Conference 2000 (IEEE Cat. No.00CH37159) pp. 538 - 546
Main Authors Weiss, M.W., Seth, S.C., Mehta, S.K., Einspahr, K.L.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2000
Subjects
Circuit faults
Circuit simulation
Circuit testing
Hardware
Logic
Microprocessors
Pulp manufacturing
Random number generation
Test pattern generators
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Summary:In simulation based design verification, deterministic or pseudo-random tests are used to check functional correctness of a design. In this paper we present a technique generating tests by specifying the don't care inputs in the functional specifications so as to improve their coverage of both design errors and manufacturing faults. The don't cares are chosen to maximize sensitization of signals in the circuit. The tests generated in this way require only a fraction of pseudo-exhaustive test patterns to achieve a high multiplicity of fault coverage.
ISBN:0780365461
9780780365469
ISSN:1089-3539
2378-2250
DOI:10.1109/TEST.2000.894247