High-performance 81-86 GHz transceiver chipset for Point-to-Point communication in SiGe BiCMOS technology
Fully integrated chipset at E-band frequencies in a superhetrodyne architecture covering the 81-86 GHz band was designed and fabricated in 0.13 μm SiGe technology. The receiver chip includes an image-reject low-noise amplifier (LNA), RF-to-IF mixer, variable gain IF amplifier, quadrature IF-to-baseb...
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Published in | 2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) pp. 417 - 420 |
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Main Authors | , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.05.2015
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Subjects | |
Online Access | Get full text |
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Summary: | Fully integrated chipset at E-band frequencies in a superhetrodyne architecture covering the 81-86 GHz band was designed and fabricated in 0.13 μm SiGe technology. The receiver chip includes an image-reject low-noise amplifier (LNA), RF-to-IF mixer, variable gain IF amplifier, quadrature IF-to-baseband de-modulators, tunable baseband filter, phase-locked loop (PLL), and frequency multiplier by four (quadrupler). The receiver chip achieves maximum gain of 73 dB, 6 dB noise figure, better than -12 dBm IIP3, with more than 65 dB dynamic range, and consumes 600 mW. The transmitter chip includes a power amplifier (PA), image-reject driver, variable RF attenuators, IF-to-RF upconverting mixer, variable gain IF amplifier, quadrature baseband-to-IF modulator, PLL, and frequency quadrupler. It achieves output power at P1dB of 16.6 dBm, P sat of 18.8 dBm on a single-ended output and consumes 1.8 W. |
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DOI: | 10.1109/RFIC.2015.7337794 |