Multiple layer parallel motion estimation on GPU for High Efficiency Video Coding (HEVC)

This paper provides a multiple-layer parallel motion estimation (ME) scheme implemented on GPU for High Efficiency Video Coding (HEVC). The scheme is hierarchically structured, including four layers: coding tree unit (CTU), prediction unit (PU), motion vector (MV) selection and instruction optimizat...

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Bibliographic Details
Published in2015 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 1122 - 1125
Main Authors Falei Luo, Siwei Ma, Juncheng Ma, Honggang Qi, Li Su, Wen Gao
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2015
Subjects
CUDA
Encoding
GPU
Graphics processing units
HEVC
Indexing
Motion estimation
Optimization
parallelization
Table lookup
Video coding
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Summary:This paper provides a multiple-layer parallel motion estimation (ME) scheme implemented on GPU for High Efficiency Video Coding (HEVC). The scheme is hierarchically structured, including four layers: coding tree unit (CTU), prediction unit (PU), motion vector (MV) selection and instruction optimization. In PU-layer, costs of various PU sizes were obtained through a SAD (sum of absolute differences) look-up table instead of progressive cost merging. And during MV selection, GPU's comparison instruction was used to avoid branches. At the same time, concurrent CTUs processing and SIMD (Single Instruction, Multiple Data) optimization also improve the performance significantly. Experimental results show that the proposed scheme can take full advantage of GPU and achieves over 90 times speedup compared with the HM10.0 using fast ME.
ISSN:0271-4302
2158-1525
DOI:10.1109/ISCAS.2015.7168835