A distinctive O(mn) time algorithm for optimal buffer insertions

With the development of technology, interconnect delay has become a key factor in VLSI. Buffer insertion is an effective technique for reducing interconnect delay. This paper presents an advanced algorithm for finding the optimal buffer insertion solution. The advanced algorithm can further improve...

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Bibliographic Details
Published inSixteenth International Symposium on Quality Electronic Design pp. 293 - 297
Main Authors Xinsheng Wang, Wenpan Liu, Mingyan Yu
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.03.2015
Subjects
Algorithm design and analysis
Buffer insertion
Capacitance
delay
Delays
Integrated circuit interconnections
interconnect
Merging
Resistance
time complexity
Wires
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Summary:With the development of technology, interconnect delay has become a key factor in VLSI. Buffer insertion is an effective technique for reducing interconnect delay. This paper presents an advanced algorithm for finding the optimal buffer insertion solution. The advanced algorithm can further improve O(mn) time algorithm for optimal buffer insertion, in which m is the number of sinks and n is the number of candidate buffer insertion positions. Assuming that the sink number m is fixed, it is a significant improvement over O(nlog 2 n) time algorithm, and the O(n 2 ) time algorithm. The improvement is made possible by a new pruning rule and the predictive merging technique that can perform 2-pin and multi-pin interconnect optimal buffer insertion faster. Based on the test cases, the advanced algorithm is evidently faster than previous best algorithm.
ISSN:1948-3287
1948-3295
DOI:10.1109/ISQED.2015.7085442