Design and analysis of novel SRAM PUFs with embedded latch for robustness

Physical Unclonable Function (PUF) is a cost-effective security primitive to address hardware attacks such as cloning, impersonation and Intellectual Property (IP) violation. Static Random-Access Memory (SRAM) PUF has been proposed; however, it suffers from challenges, some of which are environmenta...

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Bibliographic Details
Published inSixteenth International Symposium on Quality Electronic Design pp. 298 - 302
Main Authors Jae-Won Jang, Ghosh, Swaroop
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.03.2015
Subjects
Fluctuations
Hardware Security
Latches
Magnetic tunneling
Noise
Non-Volatile SRAM PUF
Physically Unclonable Function
Random access memory
Robust PUF
Robustness
SRAM PUF
Transistors
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Summary:Physical Unclonable Function (PUF) is a cost-effective security primitive to address hardware attacks such as cloning, impersonation and Intellectual Property (IP) violation. Static Random-Access Memory (SRAM) PUF has been proposed; however, it suffers from challenges, some of which are environmental fluctuations such as voltage, temperature, and noise. Ensuring the robustness of SRAM PUF under such conditions is challenging. In this paper, we propose 8T SRAM PUF with a back-to-back PMOS latch to improve robustness by 4X. We also propose a low-power 7T SRAM with embedded Magnetic Tunnel Junction (MTJ) devices to enhance the robustness (2.3X to 20X) while lowering the leakage power and area overhead.
ISSN:1948-3287
1948-3295
DOI:10.1109/ISQED.2015.7085443