Toward High-Yield 3D Self-Alignment of Flip-Chip Assemblies via Solder Surface Tension

Flip-chip assembly with self-alignment down to sub-micron accuracy opens the door for low-cost assembly of micro-photonic chips. The surface tension of melted solder can be used to bring chips into alignment. The use of lithographically defined mechanical structures to stop the solder induced moveme...

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Bibliographic Details
Published in2016 IEEE 66th Electronic Components and Technology Conference (ECTC) pp. 588 - 594
Main Authors Martin, Yves, Jae-Woong Nah, Kamlapurkar, Swetha, Engelmann, Sebastian, Barwicz, Tymon
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2016
Subjects
Force
Friction
micro-photonic component assembly
Optical waveguides
Photonics
solder surface tension
Solder-induced alignment
Substrates
Surface tension
Three-dimensional displays
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Summary:Flip-chip assembly with self-alignment down to sub-micron accuracy opens the door for low-cost assembly of micro-photonic chips. The surface tension of melted solder can be used to bring chips into alignment. The use of lithographically defined mechanical structures to stop the solder induced movement provides sub-micron alignment accuracy. However, several factors can impact the solder re-alignment yield. In this paper, we investigate the various yield limiting contributors and show that sensitivity to solder volume is the dominating factor. Variation in the amount of solder strongly impacts the lateral and vertical force induced by the solder, resulting in two small a process window for manufacturability. We show through models and experiments a design-based solution that dramatically improves the process window and yield. By the addition of local solder "reservoirs" we create a self-balanced system to improve solder plating tolerances from just a few percent to nearly a factor of two.
DOI:10.1109/ECTC.2016.239