Crosstalk-Aware Mapping for Tile-Based Optical Network-on-Chip
Silicon photonics appears today a promising solution to handle future communication needs. However, photonic networks-on-chip suffer from crosstalk noise which affects the signal-to-noise ratio (SNR) constraining the network scalability. In this paper, we first formulate the problem of crosstalk-awa...
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Published in | 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems pp. 1139 - 1142 |
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Main Authors | , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.08.2015
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Subjects | |
Online Access | Get full text |
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Summary: | Silicon photonics appears today a promising solution to handle future communication needs. However, photonic networks-on-chip suffer from crosstalk noise which affects the signal-to-noise ratio (SNR) constraining the network scalability. In this paper, we first formulate the problem of crosstalk-aware mapping and then we propose an algorithm which automatically maps the IP cores onto a generic mesh-based photonic NoC architecture such that the worst-case crosstalk is minimized. Experimental results show that the crosstalk noise can be significantly reduced allowing a higher network scalability. |
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DOI: | 10.1109/HPCC-CSS-ICESS.2015.289 |