A scalable scheduling algorithm for coarse-grained reconfigurable architecture

• Published in: 2013 IEEE International Conference on Consumer Electronics (ICCE) pp. 542 - 543
• Main Authors: Park, Hae-woo, Kim, Wonsub, Yoo, Donghoon, Ryu, Soojung, Kim, Jeongwook
• Format: Conference Proceeding Journal Article
• Language: English
• Published: IEEE 01.01.2013
• Subjects: Algorithm design and analysis; Algorithms; Architecture; Architecture (computers); Clustering algorithms; Conferences; Consumption; Electronics; Optimization; Reconfigurable architectures; Schedules; Scheduling; Scheduling algorithms
• ISBN: 1467313610; 9781467313612
• ISSN: 2158-3994; 2158-4001
• DOI: 10.1109/ICCE.2013.6487011

Coarse-grained reconfigurable architectures (CGRA's) are introduced as flexible architectures that can efficiently execute various types of applications in a single device. A CGRA often achieve high IPC by utilizing tens or hundreds of functional units (FU's). The key technique in exploiting a CGRA is to find an optimal mapping of operations over FU's. Modulo scheduling algorithm is known as the state-of-art technique to find fairly efficient solution; however it often takes too much time and occasionally fails as the number of FU is increasing. In this paper, we propose a novel two-stage scheduling algorithm which finds out a solution within a reasonable amount of time. The experimental result presents the proposed algorithm reduces the scheduling time by 92% and finds out schedules that are as efficient as the solutions given by the previous modulo scheduler.