Executing discrete orthogonal transformations based on computations on the Galois field in the FPGA architecture

A general method of designing digital devices has been proposed to execute discrete orthogonal transformations on distributed programmable architecture system, the elements of which are field programmable logic arrays (FPGA). The digital devices mentioned above are implemented using similar IP cores...

Full description

Saved in:
Bibliographic Details
Published in2016 International Siberian Conference on Control and Communications (SIBCON) pp. 1 - 4
Main Authors Zakharov, V. M., Shalagin, S. V.
Format Conference Proceeding Journal Article
LanguageEnglish
Published IEEE 01.05.2016
Subjects
Architecture (computers)
Arrays
Computation
Computer architecture
Conferences
Devices
Digital
digital devices
Distributed computing
Field programmable gate arrays
FPGA
Galois fields
IP networks
nolinear polynomial functions
Time complexity
Transformations
US Department of Transportation
Online AccessGet full text

Cover

More Information
Summary:A general method of designing digital devices has been proposed to execute discrete orthogonal transformations on distributed programmable architecture system, the elements of which are field programmable logic arrays (FPGA). The digital devices mentioned above are implemented using similar IP cores that allow executing distributed computations on the Galois field in the FPGA architecture.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Conference-1
ObjectType-Feature-3
content type line 23
SourceType-Conference Papers & Proceedings-2
ISSN:2380-6516
DOI:10.1109/SIBCON.2016.7491652