Silicon nanocrystals: from Coulomb blockade to memory arrays
Silicon nanocrystals provide opportunity to solve the challenging problem of tunnel oxide scaling of conventional flash memories by increasing immunity to charge loss via tunnel oxide defects. New aspects in silicon nanocrystal memory technology include Coulomb blockade or charge confinement effects...
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Published in | 4th IEEE Conference on Nanotechnology, 2004 pp. 290 - 292 |
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Main Authors | , , , , , , , , , , , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
Piscataway NJ
IEEE
2004
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Subjects | |
Online Access | Get full text |
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Summary: | Silicon nanocrystals provide opportunity to solve the challenging problem of tunnel oxide scaling of conventional flash memories by increasing immunity to charge loss via tunnel oxide defects. New aspects in silicon nanocrystal memory technology include Coulomb blockade or charge confinement effects, atomistic nucleation, and nanocrystal passivation to preserve them during subsequent processing and program/erase endurance characteristics. This paper discusses the above characteristics and culminates in presenting salient results from 4 Mb NOR memory arrays fabricated using 90 nm CMOS technology. Excellent memory characteristics including tight Vt distributions are obtained using a tunnel oxide thickness of 5 nm and a 6 V power supply. |
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ISBN: | 0780385365 9780780385368 |
DOI: | 10.1109/NANO.2004.1392328 |