Floating-point bitwidth analysis via automatic differentiation
Automatic bitwidth analysis is a key ingredient for highlevel programming of FPGAs and high-level synthesis of VLSI circuits. The objective is to find the minimal number of bits to represent a value in order to minimise the circuit area and to improve efficiency of the respective arithmetic operatio...
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Published in | 2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings pp. 158 - 165 |
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Main Authors | , , , , |
Format | Conference Proceeding |
Language | English |
Published |
New York, NY
IEEE
2002
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Subjects | |
Online Access | Get full text |
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Summary: | Automatic bitwidth analysis is a key ingredient for highlevel programming of FPGAs and high-level synthesis of VLSI circuits. The objective is to find the minimal number of bits to represent a value in order to minimise the circuit area and to improve efficiency of the respective arithmetic operations, while satisfying user-defined numerical constraints. We present a novel approach to bitwidth- or precision-analysis for floating-point designs. The approach involves analysing the dataflow graph representation of a design to see how sensitive the output of a node is to changes in the outputs of other nodes: higher sensitivity requires higher precision and hence more output bits. We automate such sensitivity analysis by a mathematical method called automatic differentiation, which involves differentiating variables in a design with respect to other variables. We illustrate our approach by optimising the bitwidth for two examples, a discrete Fourier transform (DFT) implementation and a Finite Impulse Response (FIR) filter implementation. |
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ISBN: | 0780375742 9780780375741 |
DOI: | 10.1109/FPT.2002.1188677 |