Low Quantization Error Readout Circuit with Fully Charge-Domain Calculation for Computation-in-Memory Deep Neural Network

• Published in: IEEE International Symposium on Circuits and Systems proceedings pp. 1 - 5
• Main Authors: Shi, Ao, Zhang, Yizhou, Han, Lixia, Zhou, Zheng, Chen, Yiyang, Liu, Lifeng, Shen, LinXiao, Huang, Peng, Liu, Xiaoyan, Kang, Jinfeng
• Format: Conference Proceeding
• Language: English
• Published: IEEE 19.05.2024
• Subjects: ADC; Artificial neural networks; Circuits and systems; Common Information Model (computing); computation in memory; Computational efficiency; deep neural network; Energy efficiency; Quantization (signal)
• ISSN: 2158-1525
• DOI: 10.1109/ISCAS58744.2024.10558346

This work presents a low quantization error readout circuit with fully-charge-domain calculation for quantization and post-process of computation-in-memory (CIM)-based neural network. The contributions include: (1) A novel residual charge accumulation function is designed to achieve charge-domain summation of quantized partial sum, and reduces 38% quantization error; (2) Charge reset is introduced in the integrate & fire circuit to realize <1 LSB INL at ±7 bits and speed of 285MHz/LSB; (3) Sample & hold, current subtraction and bidirectional counter are designed to improve 3.95× energy efficiency and 2.48× area efficiency.