Interfacial Oxide Layer Scavenging in Ferroelectric Hf0.5Zr0.5O2-Based MOS Structures With Ge Channel for Reduced Write Voltages

• Published in: IEEE transactions on electron devices Vol. 70; no. 8; pp. 4479 - 4483
• Main Authors: Park, Chinsung, Kashyap, Harshil, Das, Dipjyoti, Hur, Jae, Tasneem, Nujhat, Lombardo, Sarah, Afroze, Nashrah, Chern, Winston, Kummel, Andrew C., Yu, Shimeng, Khan, Asif Islam
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.08.2023; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Capacitors; Coercivity; Electric potential; Electrodes; FE metal-insulator-metal (MIM) capacitor; ferroelectric (FE) metal-oxide-semiconductor (MOS) capacitor; Ferroelectric materials; Ferroelectricity; Field effect transistors; Germanium; Hf₀.₅Zr₀.₅O₂ (HZO); Iron; Metal oxide semiconductors; oxygen-scavenging; Scanning transmission electron microscopy; Scavenging; Semiconductor devices; Silicon; Silicon substrates; Substrates; Thickness; Thinning; Titanium; Voltage; Voltage measurement; write voltage
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2023.3288510

Strategies to reduce the interfacial oxide layer thickness in ferroelectric (FE) Hf 0.5 Zr 0.5 O 2 (HZO) metal-oxide-semiconductor capacitor (FE-MOS) structures on Ge and Si substrates were investigated by electrode engineering, as means to reduce the write voltage in FE field-effect transistors (FEFETs). When the gate metal in Ge FE-MOS capacitors is changed from W (control) to Pt/Ti, the coercive voltage is reduced from ~2.5 to ~0.9 V (a 66% reduction) along with a 64% increase in the capacitance consistent with an interfacial layer (IL) thinning. High-resolution scanning transmission electron microscopy (HR-STEM) reveals no visible IL with Pt/Ti electrodes in Ge FE-MOS, suggesting the scavenging of oxygen from the GeO x IL by the Pt/Ti electrode. However, a much smaller reduction of the coercive voltage was observed on Si FE-MOS structures with Pt/Ti electrodes. In this study, it is demonstrated that IL thinning might provide a pathway to reduce the write voltage in FEFETs based on conventional semiconductor channel materials down to a logic-compatible level.