Invited: Buried Power Rails and Back-side Power Grids: Prospects and Challenges
Buried power rails and back-side power grids are promising technology-scaling boosters for advanced CMOS technology nodes. System-level evaluation of these technologies shows tremendous promise from power-performance-area (PPA), IR drop, and dynamic voltage droop perspective. However, several proces...
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Published in | 2023 60th ACM/IEEE Design Automation Conference (DAC) pp. 1 - 4 |
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Main Authors | , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
09.07.2023
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Subjects | |
Online Access | Get full text |
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Summary: | Buried power rails and back-side power grids are promising technology-scaling boosters for advanced CMOS technology nodes. System-level evaluation of these technologies shows tremendous promise from power-performance-area (PPA), IR drop, and dynamic voltage droop perspective. However, several process, device, and architectural challenges must be addressed to realize the full potential of this technology. This article reviews the advancements and challenges in successfully adopting buried power rail and back-side power grid technology. |
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DOI: | 10.1109/DAC56929.2023.10247775 |