An Effective Faulty TSV Detection Scheme for TSVs in High Bandwidth Memory

Through-Silicon Vias (TSVs) are essential parts of interconnects in 3-D ICs such as high bandwidth memory (HBM). TSV defects from fabrication or electromigration can increase the resistance of defective TSVs and degrade signal integrity. As many TSVs are implemented in HBMs, effective testing of TSV...

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Bibliographic Details
Published in2023 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 1 - 5
Main Authors Junsen, He, Yoon, Dong-Hyun, Kim, Tony Tae-Hyoung
Format Conference Proceeding
LanguageEnglish
Published IEEE 21.05.2023
Subjects
3-D IC
Bandwidth
Circuit faults
Fault diagnosis
faulty TSV detection
High bandwidth memory
Integrated circuit interconnections
Manuals
Resistance
sensor
transceiver
Transceivers
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Summary:Through-Silicon Vias (TSVs) are essential parts of interconnects in 3-D ICs such as high bandwidth memory (HBM). TSV defects from fabrication or electromigration can increase the resistance of defective TSVs and degrade signal integrity. As many TSVs are implemented in HBMs, effective testing of TSVs and identifying defective TSVs become evermore significant. In this paper, we propose a faulty TSV detection scheme for identifying the locations of faulty TSVs without time-consuming manual probing. TSV conditions are sensed by transmission signal between transceivers. Such signal will also operate in transition-time-to-voltage converter and sensor for TSV condition checking. The location of faulty TSV indication signals from the sensors in each core die will transmit back to the base logic die for further operations. Moreover, the proposed detector can detect faulty TSVs while the transceivers are operating.
ISSN:2158-1525
DOI:10.1109/ISCAS46773.2023.10181848