Design-Space Exploration of Multiplier Approximation in CNNs

• Published in: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) pp. 1 - 6
• Main Authors: Raghava, S N, Prashanth, H C, Gowda, Bindu G, Nandi, Pratyush, Rao, Madhav
• Format: Conference Proceeding
• Language: English
• Published: IEEE 20.06.2023
• Subjects: Approximate Computing; Approximate multipliers; CIFAR-10; Compressor; Computational modeling; Computer architecture; Convolution; Convolutional Neural Network; Hardware; Image coding; MNIST; Quantization (signal); Very large scale integration
• ISSN: 2159-3477
• DOI: 10.1109/ISVLSI59464.2023.10238594

In terms of the hardware design, approximation offers not only low power and compact footprint benefits but also accelerated outcomes. Quantization of the data format is one of the approximation methods aimed at improving hardware efficiency. However, quantization when applied to the datapath design reduces the computational accuracy and also the control over the expected precision. Besides, the quantized format applies to all layers in the Neural Network (NN) leading to a cumulative accuracy drop. Placing Approximate Multipliers (AM) to perform feature extraction in the NN model allows tighter control of the approximation along the datapath flow, and reaps a fine balance between model accuracy and hardware benefits. However, most of the literature study characterizes individual AMs and has not examined the compounded effect of the AM design when employed for convolutional layers in the NN model. This paper aims to close this gap by adopting three categories of AMs available in the literature: i) Evolutionary algorithm generated 36 AMs referred to as Apprx-A, ii) 20 Approximate compressor-based multipliers referred to as Apprx-B, and iii) 8 Positive and Negative Error distributed AMs referred to as Apprx-C, and performing an exhaustive design-space exploration of these individual multipliers with exact multipliers over three convolutional neural networks (CNNs) that are trained to classify images from the popular datasets - CIFAR-10, MNIST, and Fashion MNIST, separately. Hardware characteristics and classification accuracy for the convolutional layers built from these AMs as against retaining it with the exact computation over multiple layers of the network model is reported. The CNN accelerator designs equipped with accuracy and hardware parameters aid in choosing the best Pareto-optimal solution as per the given requirements. This work is an attempt to characterize and realize hardware-aware CNN accelerator designs, which is a step towards establishing an NN architecture search framework for the underlying hardware.