An Energy-Efficient Computing-in-Memory Neuromorphic System with On-Chip Training

• Published in: 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS) pp. 1 - 4
• Main Authors: Zhao, Zhao, Wang, Yuan, Zhang, Xinyue, Cui, Xiaoxin, Huang, Ru
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.10.2019
• Subjects: analog computation; bio-plasticity synapses; computing-in-memory (CIM); multiply-and-accumulate (MAC); neuromorphic computing system; Neuromorphics; Neurons; on-chip training; Random access memory; Static VAr compensators; Synapses; Testing; Training
• DOI: 10.1109/BIOCAS.2019.8918995

The aim of neuromorphic computing system is to implement the computational power and efficiency of the human brain. Computing-in-memory (CIM) is a promising and energy-efficient way to perform intensive computations, whose structure is similar to human brain synapse. A 8.78TOPS/W biologically-inspired neuromorphic computing system for pattern recognition based on CIM architecture is presented in this work. The proposed system supports on-chip training with energy-efficient bio-plausible spike-timing-dependent plasticity (STDP) rule and performs multiply-and-accumulate (MAC) computations inside SRAM array during inference, which greatly reduces the energy consumption. Simulated in 65-nm technology, the proposed system achieves good performance and energy efficiency for pattern recognition. The total energy consumption of training and classifying per image of the proposed system is 0.20 nJ. And the proposed spiking neural network (SNN) just consumes 0.074mW at 1.0V with the throughput of 2.5M images/s in inference phase.