Electronic implementation of artificial neural network with URAN

This paper describes the neural network implementation with full custom neural VLSI. The URAN neuro-chips of analogue-digital mixed operation are used to yield the speed of hundred giga connections per second. An artificial neural network module is suggested by using synapse chips and neuron chips f...

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Bibliographic Details
Published inInternational Joint Conference on Neural Networks, Nagoya, 1993 Vol. 2; pp. 1963 - 1966 vol.2
Main Authors Han, I I-Song, Ahn, K I-Hwan, Park, Ki-Chul
Format Conference Proceeding Journal Article
LanguageEnglish
Published IEEE 1993
Subjects
Artificial neural networks
CMOS technology
Electric resistance
Hardware
Microcomputers
MOSFET circuits
Neurons
Switches
Transistors
Voltage
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Summary:This paper describes the neural network implementation with full custom neural VLSI. The URAN neuro-chips of analogue-digital mixed operation are used to yield the speed of hundred giga connections per second. An artificial neural network module is suggested by using synapse chips and neuron chips for use on a personal computer of size of more than hundreds of thousand connections.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISBN:0780314212
9780780314214
DOI:10.1109/IJCNN.1993.717041