Reliability and Robustness Performance of 1200 V SiC DMOSFETs

Detailed experimental results from gate oxide reliability and robustness characterization of 1200 V/75 mΩ SiC DMOSFETs are presented. The threshold voltages were stable after 1000 hour +20 V and - 10 V gate bias stress applied at a junction temperature of 175°C. Unclamped inductive switching yielded...

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Bibliographic Details
Published in2020 IEEE International Reliability Physics Symposium (IRPS) pp. 1 - 4
Main Authors Sundaresan, Siddarth, Mulpuri, Vamsi, Park, Jaehoon, Singh, Ranbir
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.04.2020
Subjects
bias temperature stress
DMOSFET
Logic gates
MOSFET
Robustness
Short-Circuit
Silicon carbide
Switches
Tunneling
UIS
Voltage measurement
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Summary:Detailed experimental results from gate oxide reliability and robustness characterization of 1200 V/75 mΩ SiC DMOSFETs are presented. The threshold voltages were stable after 1000 hour +20 V and - 10 V gate bias stress applied at a junction temperature of 175°C. Unclamped inductive switching yielded single-pulse avalanche energy of 950 mJ and an avalanche withstand time of 80 μs. The short-circuit withstand time varied from 5 μs for a device with drain saturation current of 5 kA/cm 2 A to 4 μs for a device with drain saturation current of 6 kA/cm 2 .
ISSN:1938-1891
DOI:10.1109/IRPS45951.2020.9128225