Target Detection System Design and FPGA Implementation Based on YOLO v2 Algorithm

This paper proposes Target detection system design and FPGA implementation based on YOLO v2 algorithm, in order to realize offline real-time image detection in a platform with limited resources and power consumption. First, this paper studied the algorithm of YOLO v2 convolutional neural network, de...

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Bibliographic Details
Published in2019 3rd International Conference on Imaging, Signal Processing and Communication (ICISPC) pp. 10 - 14
Main Authors Bi, Fanghong, Yang, Jun
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.07.2019
Subjects
Convolution
Convolution Neural Network
Convolutional neural networks
Field programmable gate arrays
FPGA
Hardware
Inference Accelerator
Object detection
Real-time systems
YOLO v2 algorithm
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DOI10.1109/ICISPC.2019.8935783

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Summary:This paper proposes Target detection system design and FPGA implementation based on YOLO v2 algorithm, in order to realize offline real-time image detection in a platform with limited resources and power consumption. First, this paper studied the algorithm of YOLO v2 convolutional neural network, designed and trained the neural network. Secondly, a special floating-point number matrix multiplication unit and a double-cache data processing circuit are designed to improve the calculation speed and cell utilization efficiency of floating-point number matrix multiplication in convolutional neural network, and further accelerate the target detection speed on the hardware level. In this paper, the above scheme is implemented at the board level. The test results show that the average recognition speed is 50frame/s under the offline state, which basically achieves the design goal of real-time detection.
DOI:10.1109/ICISPC.2019.8935783