Reconfigurable Multifunctional Terahertz Holographic Metasurface using CMOS Chip Tiling

In this article, we exploit electromagnetic-circuit co-design approach to demonstrate a digitally reconfigurable metasurface at 0.3 THz. Realized on an industry standard 65-nm CMOS process, each metasurface CMOS chip consists 12×12 array of reconfigurable split-ring unit cells. Reconfiguration of ea...

Full description

Saved in:
Bibliographic Details
Published in2021 IEEE 19th International Symposium on Antenna Technology and Applied Electromagnetics (ANTEM) pp. 1 - 3
Main Authors Venkatesh, Suresh, Lu, Xuyang, Saeidi, Hooman, Sengupta, Kaushik
Format Conference Proceeding
LanguageEnglish
Published IEEE 08.08.2021
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:In this article, we exploit electromagnetic-circuit co-design approach to demonstrate a digitally reconfigurable metasurface at 0.3 THz. Realized on an industry standard 65-nm CMOS process, each metasurface CMOS chip consists 12×12 array of reconfigurable split-ring unit cells. Reconfiguration of each unit cell happens through EM-circuit co-designed CMOS transistor switches. Each unit-cell is individually addressable and controllable with on-chip high-speed digital back-end. Scalability of this approach is demonstrated by tiling such CMOS chips to form a larger aperture of 2×2 array. We experimentally demonstrate multi-functional applications namely, arbitrary amplitude and phase control, high-speed beam modulation with switching ON/OFF ratio of ~25 dB at a maximum clock speed of 5 GHz, beamforming capability of ± 30°, and spatial wavefront manipulation using binary-amplitude-only holography technique at 0.3 THz. Each metasurface consumes a total DC power of (240 µW) consumption and operates at 1.2V.
ISSN:2473-3555
DOI:10.1109/ANTEM51107.2021.9518737