Recipes to build-up a rad-hard CMOS memory

Rad-Hard memories are becoming increasingly popular for space applications such as electronics on-board satellites. Unlike the components used in terrestrial mass application, their peculiarities are not the available storage size, but the resiliency to the physical effects present in space (electro...

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Bibliographic Details
Published in2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS) pp. 216 - 219
Main Authors Calligaro, Cristiano, Gatti, Umberto
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.07.2019
Subjects
Computer architecture
EdgeLess Transistors (ELT)
Flash
Microprocessors
Nonvolatile memory
OTP
Radiation hardening (electronics)
Radiation-Hardening-by-design (RHDB)
Random access memory
Shape
Single Event Effects (SEE)
Space Electronics
SRAM
Total Ionizing Dose (TID)
Transistors
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Summary:Rad-Hard memories are becoming increasingly popular for space applications such as electronics on-board satellites. Unlike the components used in terrestrial mass application, their peculiarities are not the available storage size, but the resiliency to the physical effects present in space (electrons, protons, heavy ions, etc.). This paper describes the methodologies needed to develop a rad-hard memory, by acting at all levels of the top-down design pyramid.
ISSN:1942-9401
DOI:10.1109/IOLTS.2019.8854396