Demonstration of a novel multiple-valued T-gate using multiple-junction surface tunnel transistors and its application to three-valued data flip-flop

• Published in: Proceedings / International Symposium on Multiple-Valued Logic pp. 305 - 310
• Main Authors: Uemura, T., Baba, T.
• Format: Conference Proceeding Journal Article
• Language: English
• Published: IEEE 2000
• Subjects: Circuits; FETs; Flip-flops; Laboratories; Logic design; Logic devices; Logic functions; National electric code; Resonant tunneling devices; Voltage
• ISBN: 9780769506920; 0769506925
• ISSN: 0195-623X; 2378-2226
• DOI: 10.1109/ISMVL.2000.848636

A novel T-gate consisting of multi-junction surface tunnel transistors (MJ-STTs) and hetero-junction FETs (HJFETs) were proposed and its operation was successfully confirmed by both simulation and experiment. The number of the devices required for their-gate can be drastically reduced due to a high functionality of the MJ-STT. Only three MJ-STTs and three HJFETs were required to fabricate the three-valued T-gate, whose number is less than one half of that of the conventional circuit. The fabricated circuit exhibited a basic T-gate operation with various logic function. Furthermore, a multiple-valued data flip-flop (D-FF) circuit could be realized by only one T-gate.